The present invention relates to a method of forming a metal wire in a semiconductor device, and more particularly to, a method in which a metal layer having a low specific resistance is formed selectively on only a barrier metal layer through a chemical vapor deposition method and a heat treatment process and a planarizing process for the metal layer are sequentially performed to form a metal wire having a low resistance.
A semiconductor device comprises of a transistor, a resistor, a capacitor and the like. A metal wire is an indispensable structural element for embodying such a semiconductor device on a semiconductor substrate. A function of the metal wire is to transmit an electrical signal, and so the metal wire should have a low resistance and a high reliability.
In general, the metal wire in the semiconductor device is formed through a damascene method. A process of forming the metal wire in the semiconductor device utilizing the damascene method is briefly described below. First, after forming an inter-insulating layer over the semiconductor substrate on which predetermined structures such as a gate and the like are formed, a trench is formed and a barrier metal layer made of titanium (Ti)/titanium nitride (TiN) is formed on the inter-insulating layer and the trench. Subsequently, a tungsten layer is formed on the barrier metal layer to fill the trench and the tungsten layer and some region of the titanium (Ti)/titanium nitride (TiN) barrier metal layer are then etched to form a tungsten metal wire.
Recently, as the semiconductor device becomes highly integrated and miniaturized, a width and thickness of the metal wire has been gradually reduced, also higher program speeds has been required. However, in a case where a tungsten plug is formed by utilizing tungsten damascene, due to a characteristic of the device which becomes integrated, it is difficult to obtain a capacitance characteristic because of the reduction of a space between the metals.
In order to solve the above capacitance problem, a capacitance value should be reduced by decreasing a height of the metal in an interconnection process. However, the reduced height increases the resistance value. A method which reduces a height of the metal line to secure a capacitance value and not change a resistance value is to introduce an interconnection with material having a lower Rs characteristic. Accordingly, as a process for substituting a tungsten plug, a plug process utilizing cooper (Cu) having a low Rs characteristic and being used in a logic device and aluminum (Al) utilized currently as wire material has been studied.
However, if aluminum is introduced through a chemical vapor deposition method for applying the current damascene method, an aluminum layer is formed on an entire upper surface of barrier metal layer. Due to the above, when a chemical mechanical polishing process is performed for forming a metal wire, problems such as dishing, scratches and the like are generated on the soft aluminum layer, these factors act to lower a reliability of the metal wire.